Haoyi Zhang

Education

Publications

2025

1. Haikang Diao*, Haoyi Zhang*, Jiahao Song, Haoyang Luo, Yibo Lin, Runsheng Wang, Yuan Wang, Xiyuan Tang. "SEGA-DCIM: Design Space Exploration-Guided Automatic Digital CIM Compiler with Multiple Precision Support". Design, Automation & Test in Europe, Lyons, France, 2025, co-first-author [PDF]
2. Haoyi Zhang, Shizhao Sun, Yibo Lin, Runsheng Wang, Jiang Bian. "AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models". ISEDA, HongKong, China, 2025 [PDF]
3. Bingyang Liu, Haoyi Zhang, Xiaohan Gao, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang. "LayoutCopilot: LLM-Empowered Analog Layout Design towards Enhanced Human-Machine Interaction". ISCAS, London, UK, 2025 [PDF]
4. Kairong Guo, Xiaohan Gao, Haoyi Zhang, Yibo Lin, Runsheng Wang. "Multi-Row Standard Cell Layout Synthesis with Enhanced Scalability". ISEDA, HongKong, China, 2025 [PDF]

2024

1. Bingyang Liu*, Haoyi Zhang*, Xiaohan Gao, Zichen Kong, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang. "LayoutCopilot: An LLM-powered Multi-agent Collaborative Framework for Interactive Analog Layout Design". TCAD 2024, co-first-author [PDF]
2. Haoyi Zhang, Xiaohan Gao, Zilong Shen, Jiahao Song, Xiaoxu Cheng, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang. "SAGERoute 2.0: Hierarchical Analog and Mixed Signal Routing Considering Versatile Routing Scenarios". Design, Automation & Test in Europe, Valencia, Spain, 2024 [PDF]
3. Xiaohan Gao, Haoyi Zhang, Bingyang Liu, Yibo Lin, Runsheng Wang, Ru Huang. "Joint Placement Optimization for Hierarchical Analog/Mixed-Signal Circuits". International Conference on Computer-Aided Design, New Jersey, USA, 2024 [PDF]
4. Haoyi Zhang, Jiahao Song, Xiaohan Gao, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang. "EasyACIM: An End-to-End Automated Analog Cll with Synthesizable Architecture and Agile Design Space Exploration". Design Automation Conference, San Francisco, USA, 2024 [PDF]
5. Lei Chen, Yiqi Chen, Zhufei Chu, etc. (Haoyi Zhang, co-author) "The dawn of AI-native EDA: Promises and challenges of large circuit models". Science China 2024 [PDF]
6. Xiaohan Gao, Haoyi Zhang, Siyuan Ye, Mingjie Liu, David Z.Pan, Linxiao Shen, Runsheng Wang, Yibo Lin, Ru Huang. "Post-Layout Simulation Driven Analog Circuit Sizing". Science China 2024 [PDF]
7. Haoyi Zhang, Jiahao Song, Haoyang Luo, Xiyuan Tang, Yuan Wang, Runsheng Wang, Ru Huang. "A 266F² Ultra Stable Differential NOR-Structured Physically Unclonable Function with < 6×10⁻⁹ Bit Error Rate Through Efficient Redundancy Strategy". TCAS-II 2024 [PDF]

2023

1. Haoyi Zhang*, Xiaohan Gao*, Haoyang Luo, Jiahao Song, Xiyuan Tang, Junhua Liu, Yibo Lin, Runsheng Wang, Ru Huang. "SAGERoute: Synergistic Analog Routing Considering Geometric and Electrical Constraints with Manual Design Compatibility". Design, Automation & Test in Europe 2023 Best Paper Award [PDF]
2. Haoyi Zhang, Xiaohan Gao, Yibo Lin, Runsheng Wang, Ru Huang. "Multi-Scenario Analog and Mixed-Signal Circuit Routing with Agile Human Interaction". ISEDA, Nanjing, China, 2023 [PDF]
3. Jiahao Song, Xiyuan Tang, Haoyang Luo, Haoyi Zhang, Xin Qiao, Zixuan Sun, Xiangxing Yang, Yuan Wang, Runsheng Wang, Ru Huang. "A Calibration-Free 15-level/Cell eDRAM Computing-in-Memory Macro with 3T1C Current-Programmed Dynamic-Cascoded MLC achieving 233-to-304-TOPS/W 4b MAC". CICC, San Antonio, TX, USA 2023 [PDF]
4. Jiahao Song, Xiyuan Tang, Haoyang Luo, Haoyi Zhang, Xin Qiao, Zixuan Sun, Xiangxing Yang, Zihan Wu, Yuan Wang, Runsheng Wang, Ru Huang. "A 4-bit Calibration-Free Computing-In-Memory Macro With 3T1C Current-Programed Dynamic-Cascode Multi-Level-Cell eDRAM". JSSC 2023 [PDF]

2022

1. Xiaohan Gao*, Haoyi Zhang*, Mingjie Liu, Linxiao Shen, David Z.Pan, Yibo Lin, Runsheng Wang, Ru Huang. "Interactive Analog Layout Editing with Instant Placement and Routing Legalization". TCAD 2022, co-first-author [PDF]
2. Yibo Lin, Xiaohan Gao, Haoyi Zhang, etc. "Intelligent and Interactive Analog Layout Design Automation". ICSICT, Nanjing, China, 2022 [PDF]

Awards

• DATE Best Paper Award, first author, 2023
• National Scholarship, Peking University, 2024
• Merit Student, Peking University, 2024
• Industry Contribution Award, Department of Design Automation and Computing Systems, Peking University (only two recipients per year in the department), 2023
• Outstanding Research Award, Peking University, 2023
• First Prize, Huawei Scholarship, 2023
• Third Prize, Huawei Scholarship, 2022
• Outstanding Graduate, Beihang University, 2022
• First Prize Scholarship(8%), Beihang University, 2021
• Merit Student, Beihang University, 2021
• Second Prize, EDA Elite Design Challenge, 2021&2022
• Empyrean Enterprise Special Award, EDA Elite Design Challenge, 2021

Internships

• Present: Physical Design Intern
  ByteDance – Jindouyun Program, Beijing
• Apr 2024 – Sep 2024: Research Intern, Machine Learning Group
  Microsoft Research Asia, Beijing
• Jul 2023 – Sep 2023: Development Intern
  Huawei Technologies Co., Ltd. (HiSilicon-Turing), Shanghai
• Jul 2022 – Jan 2023: Development Intern
  Primarius Technology Co., Ltd., Beijing

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